Session 11-Low-Power Processing (Poster)-Enhancing GALS Processor Performance Using Data Classification Based on Data Latency

Resumen

This paper proposes a new approach for improving the performance of Globally Asynchronous Locally Synchronous (GALS) circuits. This approach takes advantage of the delay dependence of the input vectors to classify input data into several classes. Each class has a clock period associated, in such a way that a suitable clock is selected for each data. This technique has been applied to a GALS pipelined RISC processor based on DLX processor. Several programs were run over this processor performing different classifications, in order to check the viability of this new approach.

J. Manuel Colmenar

Catedrático de Universidad

Mis intereses de investigación se centran en las metaheurísticas aplicadas a problemas de optimización. He trabajado en diferentes problemas de optimización combinatoria aplicando algoritmos trajectoriales como GRASP o VNS. Además, estoy muy interesado en las aplicaciones de la Evolución Gramatical, específicamente en el dominio de los modelos y la predicción, como alternativa a los enfoques de aprendizaje automático.